Difference between revisions of "FPC internals"
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# [[The inline assembler parser]] | # [[The inline assembler parser]] | ||
# [[The code generator]] | # [[The code generator]] | ||
| − | ## [[Node code generator]] | + | ## [[FPC_Internals/CPU_Target|Node code generator]] |
## [[Code generator abstraction layer]] | ## [[Code generator abstraction layer]] | ||
## [[The register allocator]] | ## [[The register allocator]] | ||
Revision as of 14:19, 10 August 2020
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The basic parts of this documentation are taken from the the 1.0.x internals documentation ([1]) written by Carl-Eric Codere. They are adapted to fit the changed parts of 1.9.x. This documentation is since 2003 under construction.
